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SIGDA E-News 1 March 2011, Vol. 41, No. 3
1 March 2011, Vol. 41, No. 3
Online archive: http://www.sigda.org/newsletter
- SIGDA News
Contributing author: Soheil Ghiasi <ghiasi@ucdavis.edu>
Contributing author: Matthew Guthaus <mrg@soe.ucsc.edu>
Contributing author: Umit Y Ogras <umit.y.ogras@intel.com>
Contributing author: Marc Riedel <mriedel@umn.edu>
Contributing author: Lin Yuan <yuanl@synopsys.com> - What is Cloud Computing?
Contributing author: D. Cenk Erdil <cenk.erdil@bilgi.edu.tr>
From: Mehmet Yildiz <mcan@acm.org> - Paper Submission Deadlines
From: Debjit Sinha <debjitsinha@yahoo.com> - Upcoming Conferences and Symposia
From: Debjit Sinha <debjitsinha@yahoo.com> - Upcoming Funding Opportunities
From: Sudeep Pasricha <sudeep@engr.colostate.edu> - Call for Demonstrations: ACM/SIGDA University Booth at DAC
From: Naehyuck Chang <naehyuck@elpl.snu.ac.kr> - Call for Papers: IEEE/ACM International Symposium on Low Power Electronics and Design
From: Naehyuck Chang <naehyuck@elpl.snu.ac.kr> - Call for Papers: IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2011)
From: Janet Wang <meilingw@email.arizona.edu> - Call for Papers: ACM Journal on Emerging Technologies in Computing Systems Special Issue on Asynchrony in System Design
From: Montek Singh <montek@cs.unc.edu> - Design Contest: 11th International Low Power Design Contest
From: Naehyuck Chang <naehyuck@elpl.snu.ac.kr> - Call for Papers: 5th IEEE International Workshop on Design for Manufacturability & Yield (DFM&Y 2011)
From: Jingwei Lu <jlu@cs.ucsd.edu> - Announcement: CS.ET - a New Subject Area at the Computing Research Repository (CoRR)
From: Igor Markov <imarkov@eecs.umich.edu> - Call for Papers: The First IEEE International Workshop on Energy and Thermal Management of Embedded Computing (ETMEC 2011)
From: Qinru Qiu <qinru.qiu@gmail.com> - Call for Papers: The 3rd International Workshop on Bio-Design Automation
From: Leonidas Bleris <bleris@utdallas.edu> - Call for Participation: 2011 International Symposium on Physical Design
From: Bill Halpin <bill@billhalpin.com> - Call for Submissions: SIGDA Ph.D. Forum at the Design Automation Conference
From: Philip Chong <pchong@cadence.com>
Comments from the Editors
Dear ACM/SIGDA members,
This month we have a contribution from Asst. Prof. D. Cenk Erdil from
Istanbul Bilgi University on "What is Cloud Computing?"
We are also in search of another E-Newsletter Associate Editor to help
with the SIGDA News section. If you are interested, please contact the
E-Newsletter Editor, Matthew Guthaus <mrg@soe.ucsc.edu>.
Matthew Guthaus, E-Newsletter Editor;
Marc Riedel, E-Newsletter Associate Editor;
Debjit Sinha, E-Newsletter Associate Editor;
Lin Yuan, E-Newsletter Associate Editor;
Umit Y Ogras, E-Newsletter Associate Editor;
Sudeep Pasricha, E-Newsletter Associate Editor;
Mehmet Yildiz, E-Newsletter Associate Editor;
End to end flows are set to reshape IC design
http://www.newelectronics.co.uk/article/31172/End-to-end-flows-are-set-to-reshap...
Providers of electronic design automation (EDA) software have
typically focused on individual point tools, or on collections of
tools aimed at a specific design domain, such as analogue or digital
physical implementation. It's time for a broader view that looks
across traditional design domains and includes everything needed to
solve a specific technology problem.
World$-1òùs first sequential logic circuits using carbon nanotubes
-A http://www.emtworldwide.com/article.aspx?ArticleID=39856
As part of NEDO's Industrial Technology Research Grant Japan-Finland
collaborative project, professors have developed a process to
manufacture high quality carbon nanotube-based TFTs on a plastic
substrate.
AMD's 'Zacate' built with standard EDA tools
http://www.eetimes.com/electronics-news/4213459/AMD-s--Zacate--built-with-standa...
Advanced Micro Devices Inc. (AMD) detailed the technical
specifications of the first of its chips known as an "accelerated
processor unit" (APU)$-1òôcombining microprocessor cores with graphicsòôat
-A the International Solid-State Circuits Conference (ISSCC) here Tuesday
(Feb. 22).
Asst. Prof. D. Cenk Erdil, $-1 Ðstanbul Bilgi University
-A
From field-programmable gate arrays to advanced service-oriented architectures,
cloud computing owes its existence to a number of technological advances and
novel approaches that almost happened together within the last decade.
Looking from an academic point of view, we can attest that cloud computing is
mere example of what grid computing promised in the 1990s, i.e., $-1òüubiquitous,
-A seamless access to the vast computing power available everywhere$-1òý [1]. Looking
-A from an IT person$-1òùs point of view, on the other hand, a-la-cloud is a novel
-A approach for business-centric computing [2].
Clouds can simply be categorized as public (open to anyone) and private
(organizational) clouds. Perhaps one widely known public cloud example is
Amazon$-1òùs Elastic Compute Cloud (EC2) that provides òüresizable compute capacityòý
-A in the cloud [3]. A good example of a research-oriented private cloud can be
the Enabling Grids for E-sciencE (EGEE) project [4] and the LHC Computing Grid,
that support processing experimental data from CERN$-1òùs Large Hadron Collider.
-A These two grids together use state-of-the-art technologies and novel computing
methods that will also set the path to what cloud computing will have to offer
in the next several years.
Current definition of cloud computing is constituted by three layers between a
client and a server, Application, Platform, and Infrastructure (Hardware),
respectively:
1) Software as a Service (SaaS): centralized management and distributed
delivery stack of applications on the Internet,
2) Platform as a Service (PaaS): a computing stack that consumes infrastructure
and applications on the cloud,
3) Infrastructure as a Service (IaaS): a mechanism to access computational
resources of service providers.
Several technologies and related concepts can be attributed as key enabling
technologies of cloud computing. Among these are:
* Virtual Organizations: an eclectic group of individuals and/or institutions
that share a common set of resources in coordination,
* Virtualization: An enabling mechanism for more efficient computing resource
utilization, both for providers and requesters,
* Autonomic Computing (automated self-provisioning): makes it possible for
resources to self-manage themselves with minimal human administration,
* Service-Oriented Architecture: allows resources to be utilized seamlessly,
i.e., without a direct reference to the underlying hardware,
* Utility Computing: is a pay-as-you-go model computing, where organizations
make use of computing resources as they need, and ideally, do not own any
particular resources,
* Multi-core architectures: makes virtualization and utility computing easier
with dedicated cores to each particular cloud service,
* Sensor Networks: with their low-powered ubiquitous sensing devices, or
motes, they make autonomic computing and scalability possible for core cloud
services, such as resource scheduling, and so on,
* Optical Fiber: acts as a waveguide in its thin, flexible and fiber form to
transmit light between two ends, permitting transmission over longer
distances and higher data rates,
* Social Networks: closes some of the gaps in cloud computing, in particular
in the trust and security areas, that have long been unanswered by grids and
clouds to date.
In summary, cloud computing is a novel approach that brings together what
earlier distributed computing incarnations have not made possible yet. Some
consider it the next IT-marketing hype, some have already made it their primary
research field. Whatever your take, cloud computing will be making itself
available as part of your daily technical dose for the next decade or so.
[1] Grimshaw, A., et al., $-1òüThe Legion Vision of a Worldwide Virtual Computeròý,
-A Communications of the ACM, v.40, n.1, p.39-45, Jan 1997.
[2] Ratcliffe, D., and Shillito, P., $-1òüCould the cloud drive a more business-
-A centric approach to security?$-1òý, Fujitsu Insights and Opinions, The Telegraph,
-A 18 Jan 2011.
[3] Amazon Team, $-1òüGetting Started Guide (API Version 2010-11-15)òý,
-A http://docs.amazonwebservices.com/AWSEC2/latest/GettingStartedGuide, Accessed
on Feb 19, 2011.
[4] Erwin, L., and Jones, B., $-1òüEnabling Grids for E-Science: The EGEE Projectòý,
-A EGEE-PUB-2009-001, 2009.
ETMEC'11 - Int'l Workshop on Energy and Thermal Management of Embedded Computing
Maui, Hawaii
July 31 - August 4, 2011
Deadline: Mar 7, 2011
http://www.edas.info
ISLPED$-1òù11 òó Intòùl Symposium on Low-Power Electronics and Design
-A Fukuoka, Japan
Aug 1-3, 2011
Deadline: Mar 13, 2011 (extended, abstracts due Mar 7, 2011)
http://www.islped.org
SLIP$-1òù11 - System Level Interconnect Prediction
-A San Diego, CA
June 5, 2011
Deadline: Mar 11, 2011 (Abstract submission deadline: Mar 4, 2011)
http://www.sliponline.org
ACM JETC - Journal on Emerging Technologies in Computing Systems
Special Issue on Asynchrony in System Design
Deadline: Mar 15, 2011
http://asyncsymposium.org/jetc
PACT'11 - Int'l Conference on Parallel Architectures and Compilation
Techniques
Galveston Island, TX
Oct 8-12, 2011
Deadline: Mar 25, 2011 (Abstract submission deadline: Mar 18, 2011)
http://parasol.tamu.edu/pact11/
DFM&Y'11 - Int'l Workshop on Design for Manufacturability & Yield
San Diego, CA (Co-located with DAC)
June 6, 2011
Deadline: Apr 3, 2011
http://vlsicad.ucsd.edu/DFMY
ASQED'11 - Asia Symposium on Quality Electronic Design
Kuala Lumpur, Malaysia
Jul 19-20, 2011
Deadline: Apr 4, 2011
http://www.asqed.org/
VLSI-SoC$-1òù11 òó Intòùl Conference on Very Large Scale Integration and System on Chip
-A Hong Kong, China
Oct 3-5, 2011
Deadline: Apr 4, 2011
http://www.ee.cuhk.edu.hk/vlsisoc2011/
IWBDA'11 - Int'l Workshop on Bio-Design Automation
San Diego, CA (Co-located with DAC)
June 6-7, 2011
Deadline: April 5, 2011
http://www.biodesignautomation.org
24th ACM SIGDA University Booth
(co-located with DAC$-1òù11)
-A San Diego, CA
Jun 5 - 10, 2011
Deadline: May 2, 2011 (tentative)
http://www.sigda.org/ubooth
Upcoming Conferences and Symposia
ISQED'11 - Int'l Symposium on Quality Electronic Design
Santa Clara, CA
Mar 14-16, 2011
http://www.isqed.org/
DATE'11 - Design Automation and Test in Europe
Grenoble, France
Mar 14-18, 2011
http://www.date-conference.com/
ISPD$-1òù11 òó Intòùl Symposium on Physical Design
-A Santa Barbara, CA
Mar 27-30, 2011
http://www.sigda.org/ispd/
TAU$-1òù11 - International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems
-A (co-located with ISPD$-1òù11)
-A Santa Barbara, CA
Mar 31 $-1òó Apr 1, 2011
-A http://www.tauworkshop.com/
SPL'11 - Southern Conference on Programmable Logic
Cordoba, Argentina
Apr 13-15, 2011
http://www.splconf.org/
ASYNC'11 - Intl. Symposium on Asynchronous Circuits and Systems
Ithaca, NY
Apr 27-29, 2011
http://asyncsymposium.org
ISCAS'11 - Int'l Symposium on Circuits and Systems
Rio De Janerio, Brazil
May 15-18, 2011
http://iscas2011.org/
ISCA$-1òù11 òó Intòùl Symposium Computer Architecture
-A San Jose, CA
Jun 4-8, 2011
http://isca2011.umaine.edu/
SLIP$-1òù11 - System Level Interconnect Prediction
-A San Diego, CA
June 5, 2011
http://www.sliponline.org
DAC$-1òù11 òó Design Automation Conference
-A San Diego, CA
Jun 5-10, 2011
http://www2.dac.com/
SASP$-1òù11 òó Symposium on Application Specific Processors
-A (co-located with DAC$-1òù11)
-A San Diego, CA
Jun 5-6, 2011
http://www.sasp-conference.org
AHS$-1òù11 - NASA/ESA Conference on Adaptive Hardware and Systems
-A (co-located with DAC$-1òù11)
-A Jun 6-9, 2011
San Diego, CA
http://www.see.ed.ac.uk/ahs2011/
MSE'11 - Microelectronics Systems Education
San Diego, CA (co-located with DAC$-1òù11)
-A Jun 5 - 6, 2011
http://www.mseconference.org
24th ACM SIGDA University Booth
(co-located with DAC$-1òù11)
-A San Diego, CA
Jun 5 - 10, 2011
http://www.sigda.org/ubooth
Upcoming Funding Opportunities
ASEE
Office of Naval Research (ONR) Sabbatical Leave Program
Deadline: N/A
http://onr.asee.org/
Naval Research Laboratory (NRL) Postdoctoral Fellowship Program
Deadline: Continuous
http://www.asee.org/fellowships/nrl/about.cfm
DARPA
Microsystems Technology Office-Wide Broad Agency
Announcement - DARPA-BAA-10-35
Deadline: Continuous
http://www.darpa.mil/mto/solicitations/baa10-35/index.html
DOD
Cognitive Neuroscience
Deadline: March 25, 2011
https://www.nuwc.navy.mil/npt/contract/info/baa2004/
Biomimetic Signal Processing and Control - BAA-RWK-10-0001
Deadline: Continuous through April 30, 2011
https://www.fbo.gov/index?s=opportunity&mode=form&id=d0517e436b70ea3a743f884bc5a....
Hardware-in-the-Loop Simulation Technologies - BAA-RWK-10-0001
Deadline: Continuous through April 30, 2011
https://www.fbo.gov/index?s=opportunity&mode=form&id=d0517e436b70ea3a743f884bc5a....
ARL/ARO Core Broad Agency Announcement for Basic and Applied
Scientific Research for Fiscal Years 2007 through 2011
(W911NF-07-R-0001)
Deadline: Continuous through September 30, 2011
http://www.arl.army.mil/www/default.cfm?Action=6&Page=8\
Robust Computational Intelligence - AFOSR-BAA-2010-01
Deadline: Continuous
http://www.wpafb.af.mil/shared/media/document/AFD-100217-027.pdf
Systems and Software - AFOSR-BAA-2010-01
Deadline: Continuous
http://www.wpafb.af.mil/shared/media/document/AFD-100217-027.pdf
ERDC BAA - Computational Science and Engineering (ITL-1)
Deadline: Continuous
http://www.mvk.usace.army.mil/contract/docs/BAA.pdf
Advanced Distributed Sensor Technologies - BAA 57-09-06
Deadline: Continuous
http://heron.nrl.navy.mil/contracts/baa/index.htm
Information Management and Decision Architectures (NRL-WIDE BAA-N00173-01)
Deadline: Continuous
http://heron.nrl.navy.mil/contracts/baa/index.htm
High Performance Computing on Massively Parallel Architectures
(BAA 64-09-01)
Deadline: Continuous
http://heron.nrl.navy.mil/contracts/baa/index.htm
ASEE-NRL Postdoctoral Fellowship Program
Deadline: N/A
http://hroffice.nrl.navy.mil/jobs/postdoc.htm
DOE
Postdoctoral Appointments
Deadline: N/A
http://www.sandia.gov/careers/postdoc.html
McDonnell Foundation
Studying Complex Systems - 21st Century Science Collaborative Activity Awards
Deadline: continuous
http://www.jsmf.org/programs/cs/
NSF
High Performance Computing System Acquisition: Enhancing the Petascale
Computing Environment for Science and Engineering - NSF 11-511
Deadline: March 7, 2011
http://www.nsf.gov/pubs/2011/nsf11511/nsf11511.htm
Cyber-Physical Systems (CPS) - NSF 10-515
Deadline: March 21, 2011
January 17, 2012
http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=503286
Strategic Technologies for CyberInfrastructure (STCI) - PD 11-7684
Deadline: March 15, 2011 - March 31, 2011
http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=503475
Emerging Frontiers in Research and Innovation 2011 (EFRI-2011) - NSF 10-596
Deadline: April 01, 2011
http://www.nsf.gov/pubs/2010/nsf10596/nsf10596.htm
Expeditions in Computing $-1òó NSF 10-564
-A Deadline: May 10, 2011
http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=503169
Call for Demonstrations: ACM/SIGDA University Booth at DAC
Call for Demonstration
24th ACM SIGDA University Booth
at the 48th Design Automation Conference
San Diego Convention Center
San Diego, California
June 5-10, 2011
This year marks the 24th University Booth at the Design Automation
Conference. The booth is an opportunity for university researchers to
display their results and to interact with participants at
DAC. Presenters and attendees at DAC are especially encouraged to
participate, but participation is open to all members of the
university community. The demonstrations include new EDA tools, EDA
tool applications, design projects, and instructional materials.
* The university booth will be located near the technical sessions for
improved visibility.
* The university booth will be open two full days. June 7th - 8th:
10am - 5pm.
* The submission is in a 5-min video presentation format. Live
demonstrations performed at the booth by university researchers
simultaneous with the video presentations. Submitted video are
considered for publications in the ACM Digital Library. Also, it
will be featured on the DAC and SIGDA web pages, and be available
year-round.
* Participants at the University Booth are also provided with modest
travel grant reimbursements, provided that posters are hung for the
entire duration of the conference and that demonstrations are
completed during the time slots that they are
scheduled. Participants who receive funding for the conference via
alternative sources such as the Ph.D. forum and Student Design
Contest are not eligible for travel grants through the University
Booth.
Tentative Deadline for registration is May 2, 2011
To apply for participation, please visit the University Booth website
( http://www.dac.com/university+booth.aspx ) Video demonstrations should
include a brief title sequence identifying the name of the research
group and university, the team members, and stating "SIGDA University
Booth at DAC 2011". Otherwise, there is complete freedom in how a
group wishes to present their work. A sample video is available on
Youtube ( http://www.youtube.com/watch?v=OJfefVCIWhU )
Booth Coordinators
Naehyuck Chang (naehyuck@elpl.snu.ac.kr)
Baris Taskin (taskin@coe.drexel.edu)
Joe Zambreno (zambreno@iastate.edu)
Call for Papers: IEEE/ACM International Symposium on Low Power Electronics and Design
Call for Papers
ISLPED 2011 (http://www.islped.org)
IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN
Location: Fukuoka, Japan
Date: August 1-3, 2011
****IMPORTANT DATES****
Abstract registration: March 7, 2011
Technical paper submission deadline: March 13, 2011
Notification of paper acceptance: April 29, 2011
Camera-ready version due: May 25, 2011
The International Symposium on Low Power Electronics and Design (ISLPED)
is the premier forum for presentation of recent advances in all aspects
of low power design and technologies, ranging from process and circuit
technologies, simulation and synthesis tools, to system level design and
optimization. Specific topics include, but are not limited to, the
following two main areas, each with three sub-areas:
1. Architecture, Circuits, and Technology
1.1. Technologies and Digital Circuits
1.2. Logic and Microarchitecture Design
1.3. Analog, MEMS, Mixed Signal and Imaging Electronics
2. Design Tools, System and Software Design
2.1. CAD & Design Tools
2.2. System Design and Methodologies
2.3. Software Design and Optimization
****TECHNICAL PAPER SUBMISSIONS****
Submissions should be full-length papers of up to 6 pages (double-column
format, font size 9pt to 10pt), including all illustrations, tables,
references and an abstract of no more than 100 words. Papers exceeding
the six-page limit will not be reviewed. Electronic submission in pdf
format only via the web is required. More information on electronic
submission to ISLPED$-1òù11 can be found at http://www.islped.org.
-A
ORGANIZING COMMITTEE:
General Co-Chairs
-Naehyuck Chang, Seoul National Univ.
-Hiroshi Nakamura, The Univ. of Tokyo
TPC Co-Chairs
-Kenichi Osada, Hitachi
-Massimo Poncino, Politecnico Di Torino
Vice General Chair
-Koji Inoue, Kyushu Univ.
Local Arrangement Chair
-Hiroaki Honda, ISIT
Treasurer
-Tohru Ishihara, Kyushu Univ.
-Yuan Xie, Penn State Univ.
Special Session Co-Chairs
-Toshinori Sato, Fukuoka Univ.
-Youngsoo Shin, KAIST
Registration Chair
-Hiroyuki Tomiyama, Ritsumeikan University
Publicity Co-Chairs
-Jian-Jia Chen, Karlsruhe Institute of Tech.
-Hamid Mahmoodi, San Francisco State Univ.
-Yu Wang, Tsinghua Univ.
Design Contest Co-Chairs
-Chia-Lin Yang, National Taiwan Univ.
-Yiran Chen, University of Pittsburgh
Exhibits Co-Chairs
-Satoshi Goto, Waseda Univ.
-Masaaki Kondo, The Univ. of Electro-Communications
Publication Co-chairs
-Masanori Hashimoto, Osaka Univ.
-Taewhan Kim, Seoul National Univ.
Web Chair
-Pai Chou, UC Irvine and National Tsing Hua Univ.
Industry Liaison
-Kunio Uchiyama, Hitachi
-Sungjoo Yoo, POSTEC
Advisors
-Kiyoung Choi (Seoul National University)
-Takayasu Sakurai (The University of Tokyo)
-Hiroto Yasuura (Kyushu University)
Call for Papers: IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2011)
Call for Papers: IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2011)
--------------------------------
The 2011 System Level Interconnect Prediction (SLIP) workshop will be
co-located with the 48th IEEE/ACM Design Automation Conference on June
5, 2011 at the Convention Center, San Diego, CA. The general technical
scope of the workshop is the design, analysis and prediction of
intercommunication fabrics in electronic systems. The organizing
committee invites original contributions to the workshop. These
contributions include papers, tutorials, panels, and special
sessions. Regular papers will be double blind reviewed. Submissions
with author information will be rejected. We accept papers based on
novelty and contributions. IEEE will hold the copyright for SLIP 2011
proceedings. Authors of accepted papers must sign an IEEE copyright
release form for their papers.
Representative technical topics include, but are not limited to:
1. Interconnect prediction and optimization at various IC design
stages
2. Interconnect design challenges and system-level NoC design
3. Design and analysis of power and clock networks
4. Interconnect architecture of structural designs and FPGAs
5. Interconnect fabrics of many-core architectures
6. Design-for-manufacturing (DFM) techniques for interconnects
7. High speed chip-to-chip interconnect design
8. Design and analysis of chip-package interfaces
9. Interconnect topologies of multiprocessor systems
10. 3D interconnect design and prediction, including through-silicon
via (TSV) architecture and monolithic 3D stacking
11. Emerging interconnect technologies, e.g., RF interconnects,
photonic networks, carbon-based interconnects, etc.
12. Synergies between chip intercommunication networks and networks
arising in other contexts such as social networks, system biology,
etc.
Important dates:
Abstract Registration Due: Mar. 4, 2011
Submission Deadline: Mar. 11, 2011
Notification Due: Apr. 1, 2011
Final Version Due: Apr. 15, 2011
Authors are invited to electronically submit papers of up to 8 pages,
double-columned, 9pt or 10pt font in IEEE proceedings format by
following the instructions at
http://www.easychair.org/conferences/?conf=slip2011. The proceedings
of SLIP 2011 will be published by IEEE Press. More details about SLIP
2011, including submission guidelines, travel funding sources, and
travel information can be found online at:
www.SLIPonline.org<http://www.sliponline.org/>
Organization Committee Members:
General Chair: Janet Wang, Univ. of Arizona, USA
Technical Program Chair: Deming Chen, Univ. of Illinois, USA
Finance Chair: Mustafa Ozdal, Intel, USA
Publicity Chair: Rasit O. Topaloglu, GLOBALFOUNDRIES Inc., USA
Local Arrangements Chair: Andrew B. Kahng, UC San Diego, USA
Publication Chair: Chen Dong, Magma, USA
Steering Committee Members:
Chung-Kuan Cheng, University of California at San Diego, USA
Giovanni De Michelli, Ecole Polytechnique Federale de Lausanne, Switzerland
Andrew B. Kahng, University of California at San Diego, USA
Paul Kohl, Georgia Institute of Technology, USA
Sherief Reda, Brown University, USA,
Program Committee Members:
Yu (Kevin) Cao, Arizona State University, USA
Chung-Kuan Cheng, University of California, San Diego, USA
Deming Chen, University of Illinois, USA
Chris Chu, Iowa State University, USA
Chen Dong, Magma Design Automation, USA
Matthew Guthaus, University of California, Santa Cruz, USA
Tsung-Yi Ho, National Cheng Kung University, Taiwan
Hui-Ru Jiang, National Chiao Tung University, Taiwan
Andrew B. Kahng, University of California, San Diego, USA
Bin Li, Intel, USA
Zhuo Li, IBM, USA
Jens Lienig, Dresden University of Technology, Germany
John Lillis, University of Illinois, Chicago, USA
Sung Kyu Lim, Georgia Institute of Technology, USA
Igor Markov, University of Michigan, USA
Mustafa Ozdal, Intel, USA
David Z. Pan, UT Austin, USA
Sherief Reda, Brown University, USA
Jarrod Roy, IBM, USA
Prashant Saxena, Synopsys, USA
Dirk Stroobandt, Ghent University, Belgium
Rasit O. Topaloglu, GLOBALFOUNDRIES, Milpitas, USA
Janet Wang, University of Arizona, USA
Payman Zarkesh-Ha, University of New Mexico, USA
ACM Journal on Emerging Technologies in Computing Systems
Special Issue on Asynchrony in System Design
DEADLINE: March 15, 2011 (note new deadline)
Authors are invited to submit papers for a special issue of the ACM
Journal on Emerging Technologies in Computing Systems (JETC) on
asynchronous design. The journal provides comprehensive coverage of
innovative work in the specification, design, analysis, simulation,
verification, testing, and evaluation of computing systems constructed
out of emerging technologies. JETC topic areas include computing and
sensing devices and systems built using microelectromechanical,
biological/biochemical, nanoscale electronic, asynchronous, and
quantum technologies.
This special issue will focus on asynchrony in system design. Papers
are solicited on any aspect of asynchronous design, ranging from the
core topics of design, synthesis, analysis and test, to new
asynchronous applications in emerging computing technologies. Topics
of interest include, but are not limited to:
- Asynchrony in emerging technologies, including bio, nano, optical and quantum
- Asynchronous variability-tolerant design and design for manufacturing
- Asynchronous power-adaptive and energy-harvesting systems
- Asynchronous on-chip networks
- Elastic and latency-tolerant synchronous and GALS systems
- CAD tools for asynchronous design, analysis, optimization and test
- Physical design of clockless and mixed-timing systems
- Reliability, security, and radiation tolerance in asynchronous systems
- Formal methods for concurrent system analysis and verification
Information about JETC, including instructions for manuscript
preparation, is available at http://jetc.acm.org. Please submit your
manuscript electronically at http://mc.manuscriptcentral.com/jetc, and
indicate "Special Issue on Asynchrony in System Design" on the cover
page and in the notes section of the submission form. Manuscripts
must conform to the JETC style (double-spaced in 10-point font), and
be limited to 20 pages for research papers, and 40-50 pages for
tutorial and survey papers.
Expanded versions of previously published conference research papers
are welcome as long as they contain at least 30% new material; authors
should clearly state in a footnote on the first page how the
manuscript differs from the conference paper. Papers simultaneously
submitted elsewhere may be returned without review.
Please contact the guest editors with any questions, and visit
http://asyncsymposium.org/jetc for up-to-date information.
SCHEDULE:
Submission Deadline: Mar 15, 2011
Author Notification: Jun 1, 2011
Revised Manuscripts Due: Jul 1, 2011
Notice of Final Acceptance: Aug 15, 2011
Final Manuscripts Due: Oct 1, 2011
Publication Date: December 2011
GUEST EDITORS:
Prof. Montek Singh
Dept. of Computer Science
Univ. of North Carolina at Chapel Hill
montek@cs.unc.edu
Prof. Steven M. Nowick
Dept. of Computer Science
Columbia University
nowick@cs.columbia.edu
Design Contest: 11th International Low Power Design Contest
IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN
11th International Low Power Design Contest
Location: Fukuoka, Japan
Date: August 1-3, 2011
Submission deadline: 11:59PM Pacific Daylight Time, May 27th, 2011.
The International Symposium on Low Power Electronics and Design
(ISLPED) is holding the International Low Power Design Contest to
provide a forum for universities to showcase original "power-aware"
designs and to highlight the innovations and design choices targeted
at low power. The goal is to encourage and highlight design-oriented
approaches to power reduction.
The best designs will be selected and invited for presentation at
ISLPED 2011. A special session in the symposium will be devoted to the
Low Power Design Contest.
An industry-sponsored cash award will be awarded to each selected
design entry (up to 5 entries may be selected). The prize money is
typically enough to cover the conference registration fee and travel
expenses for the speaker.
The deadline for submissions is 11:59PM Pacific Daylight Time, May
27th, 2011. The manuscript and a cover page (must be in separate PDF
files) should be submitted electronically to both Design Contest
Chairs. The author name(s) and affiliation(s) must be omitted in the
main manuscript for blind review. Acceptance and rejection notices
will be emailed to the contact author in late June. More information
on design contest submission can be found at http://www.islped.org.
Design Contest Co-Chairs
Chia-Lin Yang
Email:yangc@csie.ntu.edu.tw
Dept. of CSIE
National Taiwan University
Taipei 10617
Taiwan
Yiran Chen
Email:yic52@pitt.edu
Dept. of EE
University of Pittsburgh
Pittsburgh, PA 15261
USA
5th IEEE International Workshop on
Design for Manufacturability & Yield (DFM&Y 2011)
San Diego Convention Center, San Diego, California, USA
June 6, 2011
Co-located with the 48th Design Automation Conference
********* Preliminary Call for Papers *********
Scope: Increased manufacturing variability in leading-edge process
technologies requires new paradigms and solution technologies for
yield optimization. SoC manufacturability and yield entails design-
specific optimization of the manufacturing, and thus enhanced
communications across the design-manufacturing interface. A wide
range of Design-for-Manufacturability (DFM) and Design-for-Yield
(DFY) methodologies and tools has been proposed in recent years.
Some of these tools are leveraged during back-end design, others
are applied just before manufacturing handoff, and still others are
applied post-design, from reticle enhancement and lithography
through wafer sort, packaging, final test and failure analysis. DFM
and DFY can dramatically impact the business performance of chip
manufacturers. It can also significantly affect age-old chip design
flows. Using DFM and DFY solutions is an investment, and choosing
the most cost effective one(s) requires careful analysis of
integration and schedule overheads, versus quantified benefits.
This workshop analyzes this key trend and its challenges, and
provides an opportunity to discuss a range of DFM and DFY solutions
for today$-1òùs SoC designs.
-A
Representative topics include, but are not limited to:
* Electrical, Design-Driven DFM
* Built-in Repair Analysis and Self-Repair
* Adaptive Design Techniques in DFM/DFY
* Embedded Test and Diagnosis
* OPC and RET
* DFM for 3D Integration
* DFM at System/Architecture Level
* Analog and Mixed-Signal DFM
* Process Monitoring IP
* Statistical Design
* Test-based Yield Learning
* Design-Aware Manufacturing
* Yield Enhancement IP
* Yield Management
Information for Authors:
To present at the Workshop, authors are invited to submit
unpublished extended abstracts or full papers, 2 to 4 pages in
length. Submissions on ambitious works in progress are also
encouraged. Each submission should include a short abstract of 50
words, and keywords. The review process is blind. Please do not
include author names or affiliations. Proposals for embedded
tutorials and panel discussions are also invited. Submit a copy of
your paper proposal as a PDF at
http://www.easychair.org/conferences/?conf=dfmy2011
The goal of the workshop is to foster unrestricted discussion in
the field of design-manufacturing interactions. Copies of papers
will be provided to attendees in the form of Workshop Notes, but no
proceedings will be published. Therefore, accepted papers can still
be submitted to other conferences and journals.
***** Submissions are due no later than April 3rd, 2011 *****
Authors will be notified of the disposition of their papers by
April 25th, 2011. Authors of accepted papers must submit an
illustrated text by May 15th, 2011 for inclusion in the Workshop
Notes, which will be provided to the attendees.
DFM&Y 2011 is sponsored by the IEEE Computer Society Test
Technology Technical Council (TTTC) in cooperation with the IEEE
Council on Electronic Design Automation (CEDA). For more
information on DFM&Y 2011, visit the workshop website at:
http://vlsicad.ucsd.edu/DFMY
Program Organizers
General Chair
R. Aitken, ARM
rob.aitken@arm.com
Program Chair
P. Gupta, UCLA
puneet@ee.ucla.edu
Publicity
J. Lu, UCSD
Steering Committee
A. B. Kahng, UCSD
A. Singh, Auburn Univ.
Y. Zorian, Synopsys
Program Committee
S. Datla, Texas Instruments
A. Gattiker, IBM
P. Gupta, UCLA
A. B. Kahng, UCSD
V. Moroz, Synopsys
N. S. Nagaraj, Texas Instruments
M. Orshansky, Univ. of Texas
D. Pan, Univ. of Texas
C.-H. Park, Samsung
J.M. Portal, Univ. of Marseilles
T. Quan, TSMC
T. Shibuya, Fujitsu
A. Singhee, IBM
R. Topaloglu, Global Foundries
A. Torres, Mentor Graphics
For general information contact:
Rob Aitken, ARM
E-mail: rob.aitken@arm.com
Announcement: CS.ET - a New Subject Area at the Computing Research Repository (CoRR)
CoRR (http://arxiv.org/corr/home) is a major online repository for
research pre-prints hosted at Cornell University. CoRR is referenced
by DBLP and is a part of arXiv $-1òó an online repository-A that started at
Los Alamos and became standard for all physics and mathematics
research in the late 1990s. When arXiv moved to Cornell, it expanded
into Computer Science by establishing CoRR. Many papers in theoretical
Computer Science, Databases, Bio-informatics and several other areas
can be found on CoRR in the form of pre-prints. While pre-prints are
not yet common in EDA, most papers on quantum computing (since early
1990s) can be found in the quant-ph area of arXiv, along with
bibliographic information on journal publications that grew out of
these pre-prints, so as to facilitate correct citation in future
publications.
A new area has been created on CoRR, called Emerging Technologies
(cs.ET), moderated by Igor Markov. Moderation does not involve
judgement about quality of the work, only relevance to the subject
area. Pre-prints can be cross-listed in several areas, e.g., cs.ET and
quant-ph. There is no limit on how many submissions can be approved,
but CoRR is not a publication.
If you have never used CoRR, please familiarize yourself with policies
as described at http://arxiv.org/corr/home. There's a link there for
first-time users that walks them through the submission process (among
other things). For users who want to find out more about CoRR, there
are two relevant links under "Information" on the left-hand side that
link to further information. "CoRR FAQs" (http://arxiv.org/corr/faqs)
is probably more useful; it answers the main questions about CoRR and
how it works that most users seem to have. Clicking on "About CoRR"
(http://arxiv.org/corr/about) will lead to pages describing the
background and history of CoRR.
The First IEEE International Workshop on Energy and Thermal Management
of Embedded Computing (ETMEC 2011)
Maui, Hawaii, July 31 - August 4, 2011
In conjunction with IEEE International Conference on Computer
Communication Networks (ICCCN 2011)
Workshop Objectives
Excessive energy dissipation has become one of the limiting factors
that prevent the sustained growth of today$-1òùs embedded computing
-A technology. High power consumption and power density reduce system
reliability, increase energy as well as cooling cost, and cut the
battery cycle time of mobile devices. Aiming at curbing the system
energy dissipation, controlling the cooling overhead and extending
battery cycle time, energy and thermal management have attracted
substantial interests in recent years. The runtime energy/thermal
management dynamically consolidates workload of computers, adjusts the
power/performance mode of devices and sometimes finds tradeoffs
between quality of services (QoS) and energy dissipation. Those
runtime management actions usually associate with performance and
energy overhead and should be chosen carefully with the consideration
of the hardware and software environment. In distributed embedded
systems, the user request activities, the battery efficiency, the
communication protocols and routing algorithms, and the user QoS
requirements are all important factors that determines the strategies
of energy and thermal management.
This workshop aims at providing a forum for researchers to discuss
issues and exchange ideas and research advances on energy/thermal
management in different areas of embedded computing, from application,
OS, and middleware development, to communication and network
optimization. The discussions shall not be limited to management and
controls of traditional battery powered systems. We welcome works
focusing on embedded systems powered by novel energy sources or
utilizing innovative energy storage techniques.
Topics covered in this workshop will include, but will not be limited
to, the following:
* Energy/thermal aware algorithm design
* Runtime energy/thermal management of embedded systems
* Energy/thermal analysis or optimization in different computing and
communication layers
* Adaptive control for runtime energy/thermal optimization
* Energy/thermal modeling of large scale distributed embedded systems
* Energy/thermal aware distributed computing at large scale
* Design and optimization of embedded systems based on renewable energy
* Battery-aware optimization of computing and communications
* Cross-layer energy/thermal management
* Co-optimization of cooling power and computation/communication power
* Network infrastructures for enhanced energy/thermal management
* Context-aware energy/thermal management of embedded computing
* Energy footprinting of embedded computing systems
* Experiences, case studies, and lessons learned for energy/thermal aware
embedded computing applications
Organization Committee
Workshop Chair
Song Ci (University of Nebraska-Lincoln, sci@engr.unl.edu)
Qinru Qiu (SUNY Binghamton, qqiu@binghamton.edu)
Submission Guidelines Authors are invited to submit manuscripts
reporting original unpublished research and recent developments in the
topics related to the workshop. Submissions should include an
abstract, key words, and the e-mail address of the corresponding
author. The length of the papers should be limited to 6 pages in
standard camera-ready format (doublecolumn, 10-pt font). Detailed
submission instructions will be posted on the workshop
webpage. Submission of a paper should be regarded as an undertaking
that, should the paper be accepted, at least one of the authors will
register and attend the workshop to present the work.
Paper submission Website: http://www.edas.info
Important Dates
Paper submission due: March 7, 2011 (Monday, 23:59 EST).
Acceptance notification: April 25, 2011
Camera-ready due: May 13, 2011
Registration due: May 13, 201
Call for Papers: The 3rd International Workshop on Bio-Design Automation
The 3rd International Workshop on Bio-Design Automation, June 6 - 7, 2011
San Diego Convention Center, Co-located with the Design Automation Conference
Workshop Website:
http://www.biodesignautomation.org
The International Workshop on Bio-Design Automation (IWBDA) brings
together researchers from the synthetic biology, systems biology, and
design automation communities. The focus is on concepts,
methodologies, and software tools to enable the computational analysis
of biological systems and the synthesis of biological functions. Still
in its early stages, the field of synthetic biology has been driven by
experimental expertise; much of its success can be attributed to the
skill of the researchers in specific domains of biology. There has
been a concerted effort to assemble repositories of standardized
components. However, creating and integrating synthetic components
remains an ad hoc process. The field has now reached a stage where it
calls for computer-aided design tools. The electronic design
automation (EDA) community has unique expertise to contribute to this
endeavor. This workshop offers a forum for cross-disciplinary
discussion, with the aim of seeding collaboration between the research
communities.
Tracks of interest include:
- Design methodologies for synthetic biology.
- Standardization of biological components.
- Automated assembly techniques.
- Computer-aided modeling and abstraction techniques.
- Engineering methods inspired by biology.
- Domain specific languages for synthetic biology.
- Data exchange standards and models for synthetic biology.
The workshop will be held on June 6 - 7, 2011 at the San Diego
Convention Center, co-located with the Design Automation Conference,
the premier conference in the field of electronic design automation
with over 10,000 attendees. Registration information will be posted on
the workshop webpage: http://www.biodesignautomation.org
For questions, please email info@biodesignautomation.org
Abstract Submission
Abstracts should be two pages long, following the ACM SIG Proceedings
templates at
http://www.acm.org/sigs/publications/proceedings-templates. Indicate
whether you would like your abstract considered for a poster
presentation, an oral presentation, or both. Include the full names,
affiliations and contact information of all authors.
Abstracts will be reviewed by the Program Committee. Those that are
selected for oral and poster presentations will distributed to
workshop participants and posted on the workshop website.
Abstracts should be submitted by April 5th at:
http://www.easychair.org/conferences
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