Facilitating PCRAM and STT-RAM as Next-Generation Memories: Architecture-Level and Application-level Perspectives
Ping Chi, University of California, Santa Barbara, USA

Definition of Methods and Tools for an Effective Smart Buildings Deployment
Alessandro A. Nacci, Politecnico di Milano, Italy

Design Methods for Energy-Efficient Optical Network on Chip
Hui Li, Ecole Centrale de Lyon, France

Designing Accurate and Low-Cost Stochastic Circuits
Te-Hsuan Chen, University of Michigan, USA

Hardware-Software Co-Design for Next Generation Dark Silicon Multimedia Systems
Muhammad Usman Karim Khan, Karlsruhe Institute of Technology, Germany

Cross Layer Logic Optimization for High-Performance VLSI Circuits
Subhendu Roy, University of Texas at Austin, USA

Critical Path Monitor Enabled Dynamic Voltage Scaling For Designs with Graceful Degradation
Yu-Guang Chen, National Tsing Hua University, Taiwan

Lithography Optimization for manufacturability of 10nm Technologies and Beyond
Yu-Hsuan Su, NTU, Taiwan

Wireless NoC-Enabled Energy Efficient Multicore Chip Design
Ryan Kim, Washington State University, USA

Electromigration Aware Cell Design
Gracieli Posser, Universidade Federal do Rio Grande do Sul, Brazil

Gate Sizing and Vth Assignment Using Lagrangian Relaxation
Guilherme Flach, UFRGS, Brazil

Hardware/Software Co-Design of Energy-Efficient Biomedical Monitors
Rubén Braojos López, EPFL, Switzerland

Model-based Software Synthesis for Cyber-physical Systems
Peng Deng, University of California, Riverside, USA

Cache and Memory Management Policies for Multi-Core Systems
Hsiang-Yun Cheng, Pennsylvania State University, USA

Testing of Interposer-Based 2.5D Integrated Circuits
Ran Wang, Duke University, USA

Designs of Emerging Nonvolatile Memories in Reliable Memory/Storage Subsystems
Wujie Wen, University of Pittsburgh, USA

Automatic Layout Synthesis for Modern Analog and Mixed-Signal Circuits
Hung-Chih Ou, National Taiwan University, Taiwan

Design and Verification Techniques for Enhancing Hardware Oriented Security and Trust
Chongxi Bao, University of Maryland, USA

System-Level Reliability-Aware Lifetime Optimization for Embedded and Dark-Silicon Systems
Taeyoung Kim, University of California, Riverside, USA

Towards Wearout-aware and Accelerated Self-healing Digital Systems
Xinfei Guo, University of Virginia, USA

Authentication and Obfuscation of Digital Signal Processing Integrated Circuits
Yingjie Lao, University of Minnesota, Twin Cities, USA

Exploiting MARTE/CCSL in Modern Design Flows
Judith Peters, University of Bremen, Germany

Timing Analysis and Optimization for Nanometer Design
Yu-Ming Yang, National Chiao Tung University, Taiwan

High-level Constructive Synthesis of Domain-Specific Kernels of Cryptography
Ayesha Khalid, RWTH aachen University, Germany

Challenges and Solutions for Emerging CAD Problems
Ye Wang, University of Texas at Austin, USA

Fast Uncertainty Quantification Algorithms for Integrated Circuits and Microelectromechanical Systems
Zheng Zhang, Massachusetts Institute of Technology, USA

Energy-efficient Network-on-Chip Design with High Speed Communication: Novel Router Structure and Reconfigurable Hybrid NoC Architecture
He Zhou, University of Arizona, USA

Providing High and Predictable Performance in Multicore Systems through Shared Resource Management
Lavanya Subramanian, Carnegie Mellon University, USA

Modeling and Simulation of Graphene Nano-Ribbon and Transition Metal Dichalcogenide Field-Effect Transistors and Circuits
Ying-Yu Chen, University of Illinois at Urbana-Champaign, USA

High-Performance Power-Efficient Solutions for Embedded Vision Computing
Hamed Tabkhi, Northeastern University, USA

Event-Driven Simulation Methodology for Analog/Mixed-Signal Systems
Jieun Jang, Seoul National University, Korea

Thermal Modeling and Runtime Management Techniques for Processors and Data Centers
Fulya Kaplan, Boston University, USA

ABCD: Accurate Booleanization of Continuous Dynamical Systems for Analog/Mixed-signal Design
Aadithya Karthik, University of California, Berkeley, USA

Gate Selection for Industrial Design Flows
Tiago J. Reimann, UFRGS, Brazil